I changed the dividsor from 0x7f to 0x2, so the clock is much faster, and the CPLD first divided clock changes from about 9Hz to about 500Hz.
gz_clock_ena(GZ_CLK_5MHz, 0x07f); // Turn on a slow clock
gz_clock_ena(GZ_CLK_5MHz, 0x02); // Fast clock
/*
* gz_test.c - 2013 guzunty
...
*/
#include <stdio.h>
#include <gz_clk.h>
int main(int argc, char* argv[])
{
char aChar;
gz_clock_ena(GZ_CLK_5MHz, 0x07f); // Turn on a slow clock
printf("\nPress any key to stop test.");
scanf("%c", &aChar);
gz_clock_dis();
return 0;
}
.END
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