MCP23s17 detector design notes

Now I am reading the MCP23X17 datasheet and try to see how to change the I2C functions into SPI functions.  I see that the only difference is in the I2C/SPI interface part.  So I look closely at their control byte and address format.



1.3.3.1 SPI Write Operation

The SPI write operation is started by lowering CS. The Write command (slave address with R/W bit cleared) is then clocked into the device. The opcode is followed by an address and at least one data byte.




1.4.2 ADDRESSING SPI DEVICES (MCP23S17)

The MCP23S17 is a slave SPI device. The slave address contains four fixed bits and three user-defined hardware address bits (if enabled via IOCON.HAEN) (pins A2, A1 and A0) with the read/write bit filling out the control byte. Figure 1-3 shows the control byte format. The address pins should be externally biased even if disabled (IOCON.HAEN = 0).






1.0 DEVICE OVERVIEW

The MCP23017/MCP23S17 (MCP23X17) device family provides 16-bit, general purpose parallel I/O expansion for I2C bus or SPI applications. The two devices differ only in the serial interface.

• MCP23017 – I2C interface

• MCP23S17 – SPI interface

The MCP23X17 consists of multiple 8-bit configuration registers for input, output and polarity selection. The system master can enable the I/Os as either inputs or outputs by writing the I/O configuration bits (IODIRA/B).

The data for each input or output is kept in the corresponding input or output register. The polarity of the Input Port register can be inverted with the Polarity Inversion register. All registers can be read by the system master.

The 16-bit I/O port functionally consists of two 8-bit ports (PORTA and PORTB). The MCP23X17 can be configured to operate in the 8-bit or 16-bit modes via IOCON.BANK.

There are two interrupt pins, INTA and INTB, that can be associated with their respective ports, or can be logically OR’ed together so that both pins will activate if either port causes an interrupt.

The interrupt output can be configured to activate under two conditions (mutually exclusive):

1. When any input state differs from its corresponding Input Port register state. This is used to indicate to the system master that an input state has changed.

2. When an input state differs from a preconfigured register value (DEFVAL register).

The Interrupt Capture register captures port values at the time of the interrupt, thereby saving the condition that caused the interrupt.

The Power-on Reset (POR) sets the registers to their default values and initializes the device state machine.

The hardware address pins are used to determine the device address.


1.3 Serial Interface

This block handles the functionality of the I2C (MCP23017) or SPI (MCP23S17) interface protocol.

The MCP23X17 contains 22 individual registers (11 register pairs) that can be addressed through the Serial Interface block, as shown in Table 1-2.


1.3.3 SPI INTERFACE

1.3.3.1 SPI Write Operation

The SPI write operation is started by lowering CS. The Write command (slave address with R/W bit cleared) is then clocked into the device. The opcode is followed by an address and at least one data byte.

1.3.3.2 SPI Read Operation

The SPI read operation is started by lowering CS. The SPI read command (slave address with R/W bit set) is then clocked into the device. The opcode is followed by an address, with at least one data byte being clocked out of the device.

1.3.3.3 SPI Sequential Write/Read

For sequential operations, instead of deselecting the device by raising CS, the master clocks the next byte pointed to by the Address Pointer. (see Section 1.3.1 “Byte Mode and Sequential Mode” for details regarding sequential operation control).

The sequence ends by the raising of CS.

The MCP23S17 Address Pointer will roll over to address zero after reaching the last register address.



1.4 Hardware Address Decoder

The hardware address pins are used to determine the device address. To address a device, the corresponding address bits in the control byte must match the pin state. The pins must be biased externally.


1.4.2 ADDRESSING SPI DEVICES (MCP23S17)

The MCP23S17 is a slave SPI device. The slave address contains four fixed bits and three user-defined hardware address bits (if enabled via IOCON.HAEN) (pins A2, A1 and A0) with the read/write bit filling out the control byte. Figure 1-3 shows the control byte format. The address pins should be externally biased even if disabled (IOCON.HAEN = 0).

1.5 GPIO Port

The GPIO module is a general purpose, 16-bit wide, bidirectional port that is functionally split into two 8-bit wide ports.

The GPIO module contains the data ports (GPIOn), internal pull-up resistors and the output latches (OLATn).

Reading the GPIOn register reads the value on the port. Reading the OLATn register only reads the latches, not the actual value on the port.

Writing to the GPIOn register actually causes a write to the latches (OLATn). Writing to the OLATn register forces the associated output drivers to drive to the level in OLATn. Pins configured as inputs turn off the associated output driver and put it in high-impedance.


1.6 Configuration and Control Registers

There are 21 registers associated with the MCP23X17, as shown in Table 1-5 and Table 1-6. The two tables show the register mapping with the two BANK bit values.

Ten registers are associated with PortA and ten are associated with PortB. One register (IOCON) is shared between the two ports. The PortA registers are identical to the PortB registers, therefore, they will be referred to without differentiating between the port designation (i.e., they will not have the “A” or “B” designator assigned) in the register tables.

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