SPI Demux bad design notes

So now the SPI slaves GPi, EEPROM etc will not have their ~CS lines connected to RPi SPI CE1.  Instead they connect to HC137 Yn, and RPi will select Yn to select which SPI to operate.

But then I found a problem.  Now RPI SPI CE1 is not connected to anything, and HC137 Yn takes its place.  I need to select/disselect Yn for each EEPROM read/write operation.  Very soon I found this awkard to handle, and I am not sure if the EEPROM timing using HC137 Yn is still acceptable.

After some thought, I found it a bad design.  A cleaner design would be to use a two input OR gate to handle each SPI device.  Now the original slave's ~CS goes to one input of the OR gate, and HC137 Yn goes to the other input.

Now let me think aloud.  If Yn is not selected, the Yn = High would make the OR gate output always high, so nothing happens.  If Yn is selected, therefore Low, then RPi CE1 would go through the OR gate like transparent.

This way I don't need to modify the EEPROM or GPi's software.  In other words, the solution is using hardware to save software adaption.

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